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DRSSTC II System

 

 

DRSSTC II in action.  Arcs are approximately 40-60".

 

Introduction

 

There were many problems associated with the operation of DRSSTC I.  The DRSSTC II

system was built to address these problems and hopefully solve them.

 

            

            DRSSTC Photo Gallery I - Big Arcs   

 

            DRSSTC Photo Gallery II - Big Arcs  

 

    DRSSTC Photo Gallery III - Big Arcs 

 

 

DRSSTC II : "A Modern Day Solid State Tesla Coil Experiment" Book

This 110+ page FULL COLOR publication documents my complete work with DRSSTC I and DRSSTC II

solid state Tesla Coils.  Includes full schematics, parts lists, simulation data, actual test data, and numerous

diagrams.  Over 60+ FULL COLOR photographs including 25 FULL SIZE, FULL COLOR spark photos!

Click here for more details 

$20.00 Each (Books can be ordered on home page through PAYPAL link)

$4.00 Shipping (US) 

Contact me for international shipping pricing.

 

 

 

DRSSTC II with new primary and new toroid.  (3D Solid Edge Model)

 

 

 

Primary Design

 

Improved Primary Coil with new strike rail (3D Solid Edge model)

 

Introduction goes here.

 

Primary Specifications:

12" Diameter Solenoid Winding

10 Turns of 0.25" Copper Tubing

0.25" Conductor Spacing

Upper Strike Rail (to protect against secondary strikes)

 

# Turns Series L (measured) Series R (measured)
1 1.0 uH TBD
2 2.2 uH TBD
3 5.8 uH TBD
4 9.0 uH TBD
5 12.4 uH TBD
6 15.6 uH TBD
7 20.6 uH TBD
8 23.7 uH TBD
9 28.7 uH TBD
10 33.7 uH TBD

 

 

 

Secondary Design

 

(Dimensions in inches)

 

Secondary Specifications:

6.5" Diameter Foam Core PVC Coilform

25" Winding Length

26 AWG Magnet Wire

Approx. 1350 Turns

Ls = 74.40mH (measured)

Rs = 95.84 ohms (measured)

Fres = 160kHz (measured)

 

 

DC Bus

 

The DC Bus provides the instantaneous energy (current) required by the DRSSTC during each pulse.  During the ON time, the high

current is supplied to the primary coil directly from the DC storage capacitor.  During the OFF time, the DC storage capacitor is

charged up again by the input AC power which is fed through a large bridge rectifier.

 

DC Storage Capacitor Specifications:

Vishay-Sprague Powerlytic 36DX

3500uF rated at 450VDC

 

 

 

Primary Capacitor Design

 

 

The primary capacitor will be a MMC capacitor type and comprised of an array of  0.33uF polypropylene capacitors rated at

2000V each.  The capacitors are GE part number 42L3332.  For my initial design, the capacitance value of my primary

capacitor was chosen according to the following relationship:

 

Primary Fres = Secondary Fres

 

The Primary Fres was calculated by assuming only 8 turns (23.7uH) of the primary coil were used.  This allows me to have

plenty of headroom on the primary coil to tune in either direction from 1 turn (1uH) to 10 turns (33.7uH).  The total primary capacitance

of this MMC capacitor is 0.11uF rated at 12kV.

 

Primary Capacitor Specifications:

Two parallel strings of 6 capacitors

0.11uF rated at 12000V

GE Part Number 42L3332 (0.33uF @ 2000V)

Total 12 Capacitors

 

 

 

Gate Transformer Design

 

The gate transformer was designed using both PSPICE and verified by bench testing.

 

Gate Transformer Specifications:

Core:  Fair Rite Toroid 5978006401 (Type 78 Material)

Primary Turns:  10T

Primary Rs:  0.003 ohm

Iprimary:  300uH

Secondary Turns: 20T

Isecondary1:  1.22mH

Secondary 1 Rs:  0.160 ohm

Isecondary2:  1.22mH

Secondary 2 Rs:  0.160 ohm

Coupling factor (k) = 0.9993 

 

Note:  All values were measured in the lab.

 

 

Base Current Feedback Transformer Design

 

This transformer is used to sample the secondary base current of the DRSSTC and use it to drive the full-bridge

power section of the system.

 

Base Current Feedback Transformer Specifications:

Core:  Fair Rite Toroid 5978006401 (Type 78 Material)

Primary Turns:  2T

Primary Rs:  TBD

Iprimary:  TBD

Secondary Turns: 70T

Isecondary:  10.15mH

Secondary  Rs:  TBD

Coupling factor (k) = TBD

 

Internal Modulator Specifications

 

The internal modulator is an onboard 555 timer based circuit which is used to pulse the DRSSTC.  It is primarily used for

troubleshooting purposes only as an external modulator is used during actual operation of the system.

 

Internal Modulator Specifications:

Min. pulsewidth:  41us

Max. pulsewidth:  200us

Min. PRF:  69Hz

Max. PRF:  4.3kHz

(using 0.022uF timing capacitor on 555 timer)

 

 


Logo, photos and original text are Copyright © 2004  by Eastern Voltage Research Corp.

All Rights Reserved. © 2004  Christopher Hill  Web Master.

Last modified  August 16, 2005 08:05:23 PM